EFFICIENT LOW-POWER CMOS VLSI DESIGN: LEVERAGING FEDERATED LEARNING FOR ADIABATIC SWITCHINGS. Jayashree1, K. Malarvizhi2, S. Karthik3 |
ANALYSIS ON PERFORMANCE COMPARISON OF VIRTUAL GRID-BASE DYNAMIC ROUTE ADJUSTMENT IN WIRELESS DETECTOR NETWORKSD Vikneshkumar1, D Kaleeswaran2, D Yuvaraj3 |
ULTRA LOW POWER AND SECURE VLSI ARCHITECTURE FOR DEDICATED SHORT RANGE COMMUNICATION APPLICATIONSRadha Kollipara1, Venkata Nagaratna Tilak Alapati2 |
A STUDY ON EDUCATION SYSTEM TO UTILIZE NEW TECHNIQUES FOR DIGITAL EDUCATION IN INDIAM Dinesh Kumar |
A LEVEL SHIFTER ANTENNA FOR HIGH SPEED COMMUNICATION USING WILSON CURRENT MIRRORV.J. Arulkarthick1 |
SIMULATION AND IMPLEMENTATION OF AC-DC INTERLEAVED BOOST CONVERTER WITH VOLTAGE MULTIPLIER FOR PHEVR. Seyezhai, V. Aarthi2 |