PERFORMANCE OF LEAKAGE POWER MINIMIZATION TECHNIQUE FOR CMOS VLSI TECHNOLOGYT. Tharaneeswaran1 and S. Ramasamy2 |
A STUDY OF USING E-RESOURCES BY RESEARCH SCHOLARS IN SELECTED INSTITUTIONS OF SOUTHERN TAMILNADU: RESEARCH METHODOLOGYV. Senthur Velmurugan |
DEVELOPMENT OF ENERGY EFFICIENT PROTOCOL FOR AD HOC NETWORKSS Soumya, K Krishna Prasad,Navin N Bappalige |
CUSTOMER SERVICE IN BANKS AND ITS IMPORTANCE IN TAMILNADUN Selvaraj1 |
RECURRENT NEURAL NETWORK FOR DISORDER DETECTION IN EEG SIGNALN R Deepa |
ENHANCED NEIGHBORHOOD NORMALIZED POINTWISE MUTUAL INFORMATION ALGORITHM FOR CONSTRAINT AWARE DATA CLUSTERINGC.N. Pushpa, Gerard Deepak, Mohammed Zakir, J Thriveni, K.R. Venugopal |