Abstract

In response to the escalating demand for energy-efficient and high-performance computing, this research explores the design and optimization of a heterogeneous System-on-Chip (SoC) architecture employing a self-adaptive neural network accelerator. Addressing the current limitations in heterogeneous SoC designs, we identify the need for dynamic adaptation to varying workloads. Our proposed methodology integrates a self-adaptive neural network accelerator that autonomously adjusts its architecture based on real-time workload characteristics. Through extensive simulations, we demonstrate significant improvements in both energy efficiency and performance compared to traditional static architectures. This research bridges the existing gap in adaptive computing, providing a promising avenue for future energy-efficient heterogeneous SoC designs.