SYSTOLIC ARRAY ARCHITECTURES FOR DISCRETE WAVELET TRANSFORM: A SURVEY
Abstract
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Demand for High Speed & Low Power Architecture for Image/Video Compression Algorithms are increasing with scaling in VLSI Technology many Architectures in the Discrete Wavelet Transform (DWT) System have been proposed. This Paper surveys the different designed DWT’s using Systolic Array Architectures and the Architectures are classified based on the application whether it is 1-D, 2-D or 3-D. This paper presents the overview of the architectures based on latency, number of MAC’s, memory used, hardware efficiency etc. and this paper will give an insight to the reader on advantages and disadvantages of the design that are to be used in various applications.

Authors
G. Nagendra Babu, Ganapathi Hegde, Pukh Raj Vaya
Amrita Vishwa Vidyapeetham, India

Keywords
Systolic Array Architecture, DWT, Image and Video Processing
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Published By :
ICTACT
Published In :
ICTACT Journal on Image and Video Processing
( Volume: 5 , Issue: 2 , Pages: 912-919 )
Date of Publication :
November 2014
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80
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