vioft2nntf2t|tblJournal|Abstract_paper|0xf4ff0c14310000004fb2100001000600 In general, power profile flattening solutions have a higher power consumption; nevertheless, when adopting increased levels of security, this is a sensible choice to make. There have been a variety of various issues raised in relation to each of these tactics, including the fact that they are difficult to scale, that they use a significant amount of energy, that they result in a performance decrease. In this paper, we develop a deep learning-based power estimation mechanism to evaluate the performance of the circuits using VLSI circuits. Various cells of VLSI circuits are evaluated to perform the evaluation of the power supply performance. The results show that the proposed method achieves higher degree of power consumption than the other methods.
N. Sivakumar1, N.S. Suresh2, G.K. Arpana3
Varuvan Vadivelan Institute of Technology, India1, Saveetha Institute of Medical and Technical Science, India2, East West College of Engineering, India3
Deep Learning, Power Estimation, VLSI Circuits
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 8 , Issue: 4 , Pages: 1471 - 1475 )
Date of Publication :
January 2023
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