Abstract

The ever increasing processing speed of microprocessors motherboards, optical transmission links, intelligent hubs and routers etc., is pushing the off-chip data rate into the gigabits-per-second range. The LVDS ((low-voltage differential signaling) is used as an interface for avionic communications, surveillance and intelligence where it protects the integrity of the transmitted signals. The main application of LVDS finds in chip to chip I/O communication. Increasing the data rate along with reductions in circuit power and chip area are major concern of high performance I/O’s to enable very high levels of silicon integration. The effective solution is proposed here to enable multi-giga-bit transmission with efficient design of LVDS. Proposed design meets the specified characteristics through DC and AC analysis with PVT analysis including all process corner variations.