Over the past few decades, the intense growth of portable communication devices has led to stringent need of efficient system performance. The system performance is upgraded by reducing the computation time using the Residue Number System. Since, it performs the complex computation efficiently. In this paper, the modified prefix adders are proposed to perform the fast modulo computations and make use of the available resources. The projected modulo adders computes the complex modulo operations in reverse conversion process of RNS independently and in parallel without carry propagation. This results in better performance than the other typical adder components in terms of area and delay.
M Augusta Angel, A Narendra Kumar
VV College of Engineering, India
Residue Number System, Reverse Converter, Prefix Adders, Computations
| January | February | March | April | May | June | July | August | September | October | November | December |
| 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 10 | 7 | 3 | 3 | 0 | 0 | 0 | 0 | 0 | 0 |
| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 2 , Issue: 3 , Pages: 261-264 )
Date of Publication :
October 2016
Page Views :
170
Full Text Views :
24
|