This paper describes the design and development of the communication protocol for the customized data communication switch (FloSwitch). This protocol concentrates on the serial link interface between PCI-e add-on cards and the FloSwitch in the parallel computing system. The serial link is an optical interconnectivity with a bit rate of 6.25Gbps in full duplex mode. The protocol receives data from the PCI-Express (PCI-e) add-on cards through the optical link at the FloSwitch and does the necessary processing on the data (example: floating point addition), and the result is transmitted through the optical link to the destinations. This task is performed according to the command field, other information available in the header and the data. This implementation is done on the Field Programmable Gate Array (FPGA).
D. Anandaraj, Rajalakshmy Sivaramakrishnan, G. Karun kumar
Flosolver unit, CSIR-National Aerospace Laboratories, Bangalore, India
FloSwitch, PCI-e Add-on Card, Optical Link, Floating Point Addition | Published By :
ICTACT
Published In :
ICTACT Journal on Communication Technology
( Volume: 4 , Issue: 4 )
Date of Publication :
December 2013
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