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ICTACT Journal on Microelectronics
An International Publication of ICT Academy
Volume 6, Issue 4 Articles
January 2021 Volume 6 Issue 4 ISSN 2395-1680
 Table of Contents
5202
FPGA IMPLEMENTATION OF CSD BASED NN IMAGE COMPRESSION ARCHITECTUREPage(s):
1052-1055
M Lakshmi Kiran1, K Nikhileswar 2, K Venkata Ramanaiah3
PVKK Institute of Technology, India1, Indian Institute of Technology, Patna, India2, Yogi Vemana University, India3
Abstract    Full Text    DOI : 10.21917/ijme.2021.0183
5201
DESIGN OF DYNAMIC VOLTAGE RESTORER USING OPTIMISED PSO - ANFIS CONTROLLER FOR POWER QUALITY IMPROVEMENTPage(s):
1048-1051
B Karthik1, M Priyanka Gandhi2
Sona College of Technology, India1, Government College of Engineering, Bargur, India2
Abstract    Full Text    DOI : 10.21917/ijme.2021.0182
5200
DESIGN AND DEVELOPMENT OF SOC BASED NETWORK ON CHIP TOPOLOGIESPage(s):
1041-1047
T Nagalaxmi1, E Sreenivasa Rao2, P Chandrasekhar3
Osmania University, India1, Vasavi College of Engineering, India2, Osmania University, India3
Abstract    Full Text    DOI : 10.21917/ijme.2021.0181
5199
INVESTIGATION ON DGS BASED LINE FED MULTIBAND PATCH ANTENNA FOR WIRELESS APPLICATIONSPage(s):
1034-1040
K V Prashanth1, Pradeep M Hadalgi2, P V Hunagund3
Gulbarga University, India1, Gulbarga University, India2, Gulbarga University, India3
Abstract    Full Text    DOI : 10.21917/ijme.2021.0180
5198
DESIGNING OF VARIATIONS TOLERANT SENSING AMPLIFIER CIRCUIT FOR DEEP SUB-MICRON MEMORIESPage(s):
1027-1033
Vivek Harshey1, S K Bansal2
Sant Longowal Institute of Engineering and Technology, India1, Sant Longowal Institute of Engineering and Technology, India2
Abstract    Full Text    DOI : 10.21917/ijme.2021.0179
5197
AN IMPROVED NANOSCALE QUASI-BALLISTIC DOUBLE GATE (DG) MOSFET MODEL WITH DRAIN BIAS DEPENDENCY ON CRITICAL CHANNEL LENGTH NEAR THE LOW FIELD SOURCE REGION BY SEMI-EMPIRICAL APPROACHPage(s):
1020-1026
Vyas R Murnal1, C Vijaya2
Shri Dharmasthala Manjunatheshwara College of Engineering and Technology, India1, Shri Dharmasthala Manjunatheshwara College of Engineering and Technology, India2
Abstract    Full Text    DOI : 10.21917/ijme.2021.0178
5196
DESIGN OF 1KB SRAM ARRAY USING ENHANCED STABILITY 10T SRAM CELL FOR FPGA BASED APPLICATIONSPage(s):
1014-1019
R Manoj Kumar1, P V Sridevi2
Andhra University College of Engineering, India1, Andhra University College of Engineering, India2
Abstract    Full Text    DOI : 10.21917/ijme.2021.0177
5195
NOVEL SLOTTED HEXAGONAL PATCH ANTENNA FOR SUB-6 GHZ 5G WIRELESS APPLICATIONSPage(s):
1010-1013
T Aathmanesan
Vel Tech University, India
Abstract    Full Text    DOI : 10.21917/ijme.2021.0176
5194
THE HIGHER MODE ELIMINATION IN MICROSTRIP PATCH ANTENNA USING DEFECTED MICROSTRIP SURFACE FOR SUPPRESSION OF CROSS POLARIZED RADIATIONS AND IMPROVED ISOLATIONPage(s):
1005-1009
S Poornima1, S Chandramma2, Halappa Gajera3
SBRR Mahajana First Grade College, India1, Yuvaraja’s College, India2, University of Mysore, India3
Abstract    Full Text    DOI : 10.21917/ijme.2021.0175
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