DESIGN OF PARALLEL ADDER USING HYBRID CLA-RCA STRUCTURE

ICTACT Journal on Microelectronics ( Volume: 12 , Issue: 2 )

Abstract

In this paper, we propose power efficient approximate carry look ahead adder (CLA) for error tolerant application. Power dissipation has become a significant issue for integrated circuit. To reduce power consumption, inexact or approximate computing has been considered as a solution where exactness is not required. Here, new approximate CLA is proposed which is based on modified equation of carry propagation. The proposed 32-bit approximate CLA is evaluated and compared with an accurate CLA and existing approximate CLA based on power and delay. The metrics of error are used to evaluate the reliability of the proposed approximate design. All circuits have been simulated in Cadence Virtuoso tool using 45-nanometer technology.

Authors

Matcha Pavani, Poothi Venkata Lakshmi, Sabbavarapu Vivek Adithya, Reddy Giridhar
Lendi Institute of Engineering and Technology, India

Keywords

Approximate Computing, Carry Look-Ahead Adder, Carry Generation, Carry Propagation, Error Metrics

Published By
ICTACT
Published In
ICTACT Journal on Microelectronics
( Volume: 12 , Issue: 2 )
Date of Publication
July 2026
Pages
2307 - 2310
Page Views
10
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