Abstract

This paper presents a comprehensive methodology for transferring a four-layer feed-forward neural network, trained on the MNIST dataset, to a Xilinx Zynq-7000 System on Chip (SoC). The pretrained parameters are transformed into custom hardware modules optimized for on-chip memory using the Zynet framework. A lightweight software routine oversees AXI-DMA transfers and the collection of results through interrupts. The synthesized network layers and data transfer engines are integrated within the programmable logic fabric, while the ARM Cortex-A9 core manages task sequencing, data validation, and user interaction. Hardware-in-the-loop testing conducted on a Zed board demonstrates that the hardware implementation achieves classification accuracy comparable to software references, rapid inference speed, and minimal processor overhead. The real-time serial output of predictions against ground-truth labels facilitates immediate verification and effective debugging. This paper exemplifies the effectiveness of hardware–software co-design in creating compact and energy-efficient neural inference systems.

Authors

Shyam Peraka, Venkatesh Mone, Sri Valli Gaddam, Manogna Annangi
Rajiv Gandhi University of Knowledge Technologies, India

Keywords

Feed-Forward Neural Network, FPGA Deployment, Zynet Framework, Hardware–Software Co-Design