AN INTELLIGENT FPGA WEARABLE CO-DESIGN FRAMEWORK USING NEURAL SURROGATE OPTIMIZATION FOR ADAPTIVE REAL-TIME SYSTEMS

ICTACT Journal on Microelectronics ( Volume: 12 , Issue: 2 )

Abstract

Wearable healthcare and intelligent monitoring systems require rapid data processing, low power consumption, and adaptive hardware configurations to satisfy the demands of real-time applications. The increasing complexity of field-programmable gate array (FPGA) wearable platforms has created a need for efficient hardware and software co-design strategies that can optimize performance without excessive computational overhead. However, conventional FPGA optimization approaches depend on iterative design-space exploration that requires substantial development time and computational resources, which limits the deployment of adaptive wearable devices in dynamic environments. To address this limitation, this study proposes the Adaptive Neural Surrogate Co-Design Optimization Framework (ANSCOF), a novel artificial intelligence driven methodology for real- time FPGA wearable systems. The ANSCOF framework integrates neural surrogate prediction, adaptive resource allocation, hardware- aware optimization, and software performance estimation within a unified co-design architecture. The neural surrogate model predicts hardware resource utilization, latency, energy consumption, and throughput before FPGA synthesis, which significantly reduces exploration complexity. The framework employs a hybrid optimization strategy that selects optimal hardware configurations and software execution parameters for adaptive wearable applications. Experimental evaluation demonstrates that the proposed ANSCOF framework achieves superior performance compared with existing FPGA optimization approaches. The framework obtains 98.1% accuracy, reduces processing latency to 16.1 ms, decreases energy consumption to 44.7 mJ, improves FPGA resource utilization efficiency to 96.4%, and achieves a throughput of 701 samples/sec. The proposed method reduces design exploration complexity and provides an efficient solution for real-time adaptive FPGA wearable devices.

Authors

Avulla Rajinidevi1, S. Vamshi Krushna2
Vignan's Institute of Management and Technology for Women, India1, Vignana Bharathi Institute of Technology, India2

Keywords

FPGA Wearable Devices, Neural Surrogate Models, Hardware Software Co-Design, Real-Time Reconfiguration, Edge Artificial Intelligence

Published By
ICTACT
Published In
ICTACT Journal on Microelectronics
( Volume: 12 , Issue: 2 )
Date of Publication
July 2026
Pages
2326 - 2334
Page Views
13
Full Text Views
2