Abstract

In high-speed signal processing, the multirate transformation is a widely used method for decimation and interpolation. The comb-based decimation filters with low complexity and strong alias rejection are preferably used in wireless applications. A linear phase FIR filter namely a cascaded-integrator-comb (CIC) filter can be used as a decimation filter. Since this filter doesn't contain a multiplier, it occupies less area and has a higher speed than other decimation filters. In digital systems, the redundant number system is frequently used to enhance the computational efficiency, which can then be further improved by an architectural change made at the circuit level. However, the frequency characteristics are also optimized by reducing the passband droop and increasing attenuation in the folding band using a compensation FIR filter. In this paper, a design of a CIC filter by using a signed digit (SD) number system-based compensation filter has been proposed and analyzed. The analysis of delay and hardware requirements in filter operation was performed. The results show improvements in average operating frequency and a reduction in LUTs of 12.32% and 15.65%, respectively, in comparison to other techniques. Further, the analysis of frequency characteristics of the proposed filter design shows that the average passband droop is reduced by 24.60% and attenuation in the folding band is increased by 22.01% in comparison to binary based filter structures.

Authors

Ajeet Kumar Srivastava, Krishna Raj
Harcourt Butler Technical University, India

Keywords

Cascaded-Integrator-Comb (CIC) filter, Canonic Signed Digit (CSD), Common Sub-expression Elimination (CSE), Grouping Methods, Sample rate converter (SCR)