Networks-On-Chip (NoCs) have been proposed as a promising solution for power, performance demands and scalability of next generation Systems-On-Chip (SOCs) to overcome the several challenges of current SoC with conventional architecture. In this article, NoC, its architecture and features are presented. Further the article is extended with research challenges. Major areas of scope for research are addressed briefly with the view that microelectronic field researchers get benefitted. Performance analysing parameters and simulation tools for NoC are also included. Future SoC design needs lot of innovations and creativity to explore its complete features. Research on NoC is mandatory at this critical juncture.
K. Paramasivam
Karpagam College of Engineering, India
Network on Chip, System on Chip, Power Dissipation, Research Challenges, NOC Architecture, Network Interface | Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 1 , Issue: 2 )
Date of Publication :
July 2015
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