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January 2024 |
Volume 9 |
Issue 4 |
ISSN 2395-1680 |
15207 |
DESIGN AND OPTIMIZATION OF HETEROGENEOUS SYSTEM-ON-CHIP ARCHITECTURE USING SELF-ADAPTIVE NEURAL NETWORK ACCELERATOR | Page(s): 1705 - 1710 |
B. Ebenezer Abishek1, C. Sharanya2, S. Gopalakrishnan3, J. Jency Rubia4 |
Vel Tech Multi Tech Dr.Rangarajan Dr.Sakunthala Engineering College, India1, Vels Institute of Science, Technology and Advanced Studies, India2, Sengunthar Engineering College, India3, Vel Tech Rangarajan Dr.Sagunthala R&D Institute of Science and Technology, India4 | Abstract Full Text DOI : 10.21917/ijme.2024.0295 |
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15201 |
DELAY ANALYSIS OF MULTIPLEXER CIRCUIT THEORY USING TRIBOELECTRIC NANOGENERATOR IN VLSI DESIGN | Page(s): 1700 - 1704 |
Avinash G. Mahalle1, Pravin Prakash Adivarekar2, M. Kumar3, Virendra Jain4, Davinder Kumar5 |
Prof. Ram Meghe Institute of Technology and Research, India1, A P Shah Institute of Technology, India2, Chettinad College of Engineering and Technology, India3, Mandsaur University, India4, Micron semiconductor Inc, Idaho, United States5 | Abstract Full Text DOI : 10.21917/ijme.2024.0294 |
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15200 |
NOVEL LOW-POWER CMOS VLSI DESIGN USING FEDERATED LEARNING BASED ADIABATIC SWITCHING PRINCIPLE | Page(s): 1693 - 1699 |
J. Muralidharan1, Manasi Dnyanesh Karajgar2, N. Kanagavalli3, S. Sudha4 |
KPR Institute of Engineering and Technology, India1, D Y Patil College of Engineering, India2, Rajalakshmi Institute of Technology, India3, Sri Ranganathar Institute of Engineering and Technology, India4 | Abstract Full Text DOI : 10.21917/ijme.2024.0293 |
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15199 |
DESIGN OF EVOLUTIONARY QUANTUM COMPUTING FOR ULTRA-COMPACT NANO-ELECTRONIC CIRCUITS IN VLSI | Page(s): 1687 - 1692 |
N.K. Anushkannan1, P. Umamaheswari2, Rakesh Kumar3, T. Lakshmi Narayana4 |
Kathir College of Engineering, India1, SRM Institute of Science and Technology, India2, University College of Engineering and Technology, Bikaner, India3, KLM College of Engineering for Women, India4 | Abstract Full Text DOI : 10.21917/ijme.2024.0292 |
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15196 |
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15195 |
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15146 |
ENHANCING CONNECTIVITY AND INTELLIGENCE THROUGH EMBEDDED INTERNET OF THINGS DEVICES | Page(s): 1670 - 1674 |
Bhushankumar Nemade1, Neelam Phadnis2, Aaditya Desai3, Kiran Krushnakant Mungekar4 |
Shree L. R. Tiwari College of Engineering, India1,2, Prin. L. N. Welingkar Institute of Management Development and Research, India 3, Tata Consultancy Services, Mumbai, India4 | Abstract Full Text DOI : 10.21917/ijme.2024.0289 |
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15140 |
ENHANCING AI MODEL SECURITY USING A HARDWARE-BASED APPROACH FOR PROTECTING FPGA IMPLEMENTATION | Page(s): 1663 - 1669 |
Syed Arfath Ahmed1, R.K. Agrawal2, Neelam Labhade Kumar3, V.S. Narayana Tinnaluri4, Geogen George5 |
Maulana Azad National Urdu University, India1, SNJB K B Jain College of Engineering, India2, Shree Ramchandra College of Engineering, India3, Koneru Lakshmaiah Educational Foundation, India4, University of Technology and Applied Sciences, Sultanate of Oman5 | Abstract Full Text DOI : 10.21917/ijme.2024.0288 |
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15139 |
OPTIMIZATION OF PROCESSING SPEEDS OF NANO ELECTRONICS CIRCUITS USING DIFFERENTIAL QUANTUM EVOLUTION FOR VLSI APPLICATIONS | Page(s): 1658 - 1662 |
Pradosh Kumar Sharma1, A. Thangam2, Somarouthu V.G.V.A Prasad3, Vaishali Mangesh Dhede4, Shadab Ahmad5 |
Chinmaya Degree College Haridwar, India1, Pondicherry University Community College, India2, Pithapur Rajah’s Government College, India3, Jaihind College of Engineering, India4, Samara University, Ethiopia5 | Abstract Full Text DOI : 10.21917/ijme.2024.0287 |
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15138 |
FPGA-BASED IMPLEMENTATION OF MEMS SENSOR NETWORKS FOR CIRCUIT THEORY APPLICATIONS | Page(s): 1653 - 1657 |
R. Gowrishankar1, Rotash Kumar2, Vibhor Kumar Singh3, N. Jayalakshmi4 |
Kalaignarkarunanidhi Institute of Technology, India1, Government Engineering College, Jhalawar, India2, Maharishi University of Information Technology, India3, PSNA College of Engineering and Technology, India4 | Abstract Full Text DOI : 10.21917/ijme.2024.0286 |
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