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ICTACT Journal on Microelectronics
An International Publication of ICT Academy
Volume 2, Issue 4 Articles
January 2017
Volume 2
Issue 4
ISSN 2395-1680
Table of Contents
2855
DESIGN AND ANALYSIS OF AN EFFICIENT FULL ADDER USING SYSTEMATIC CELL DESIGN METHODOLOGY
Page(s):
333-336
G Jyothish Chandran, Anila Susan George, Anu Raj
Saintgits College of Engineering, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0058
2854
ANALYSIS OF COMPLEMENTARY BEAM STRUCTURED RF MEMS SWITCH FOR WIRELESS APPLICATIONS
Page(s):
329-332
R Raman, T Shanmuganantham
Pondicherry University, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0057
2853
DESIGN AND READ STABILITYANALYSIS OF 8T SCHMITT TRIGGER BASED SRAM
Page(s):
323-328
Priyanka Lee Achankunju, K S Sreekala, Marie K. James
Saintgits College of Engineering, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0056
2852
A CASE STUDY ON CLUSTER BASED POWER-AWARE MAPPING STRATEGY FOR 2D NoC
Page(s):
315-322
S Salini
1
, A Aravindhan
2
, G Lakshminarayanan
3
Saintgits College of Engineering, India
1
, Saintgits College of Engineering, India
2
, National Institute of Technology, Tiruchirappalli, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0055
2851
A HIGH GAIN AND LOW NOISE CMOS GILBERT MIXER WITH IMPROVED LINEARITY BASED ON MGTR AND SWITCHED BIASING TECHNIQUE
Page(s):
311-314
Shasanka Sekhar Rout, Kabiraj Sethi
Veer Surendra Sai University of Technology, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0054
2850
A REVIEW ON ZnO HETEROJUNCTION PHOTODETECTOR FOR UV APPLICATION
Page(s):
305-310
Jitty Jose, Ajith Ravindran, Keerthi K Nair
Saintgits College of Engineering, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0053
2849
DESIGN AND IMPLEMENTATION OF HIGH SPEED LATCHED COMPARATOR USING gm/Id SIZING METHOD
Page(s):
300-304
R. Vinoth
1
, S Ramasamy
2
Microchip Technology Pvt. Ltd., India
1
, Addis Ababa Science and Technology University, Ethiopia
2
Abstract
Full Text
DOI :
10.21917/ijme.2017.0052
2848
DESIGN AND READ STABILITYANALYSIS OF 8T SCHMITT TRIGGER BASED SRAMDESIGN OF FIVE PORT PRIORITY BASED ROUTER WITH PORT SELECTION LOGIC FOR NoC
Page(s):
293-299
Meenu Anna George
1
, A Aravindhan
2
, G Lakshminarayanan
3
Saintgits College of Engineering, India
1
, Saintgits College of Engineering, India
2
, National Institute of Technology, Tiruchirappalli, India
Abstract
Full Text
DOI :
10.21917/ijme.2017.0051
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