An accurate design of low power Voltage Controlled Oscillator (VCO) enabled quantizer in Continuous Time Sigma Delta ADC in 180nm CMOS technology using Tanner EDA tools is done. The proposed architecture consists of the loop filter, VCO quantizer and the DAC in the feedback side of model. The Operational Amplifier (OPAMP) used in design of loop filters offers 40dB gain, 70 degree phase margin and unity gain bandwidth of 79.06MHz. Even order harmonics of VCO are reduced by VCO quantizer loop structures. The Higher order loop filter is designed using an active Resistance and Capacitive based integrators and VCO quantizer is implemented using 15 multiple stage ring oscillator and register of DFF which provides an added advantage of low phase noise with frequency of 100 KHz rang. Remarkable power dissipation of overall circuit is 3.8 mW
Anikta Khurana, Anil Kumar Sahu
Shri Shankaracharya Group of Institutions (FET), India
Analog to Digital Converter (ADC), Operational Amplifier (OPAMP), Nonidealities, Voltage Controlled Oscillator (VCO)
| January | February | March | April | May | June | July | August | September | October | November | December |
| 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 3 | 19 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 2 , Issue: 1 , Pages: 193-197 )
Date of Publication :
April 2016
Page Views :
158
Full Text Views :
33
|