Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) codes are highly effective error correction codes due to their structured sparsity, providing low complexity and superior error performance. However, improving their performance with modern classification techniques remains a challenge. This study integrates Support Vector Machine (SVM) generation with QC-LDPC codes to optimize error correction efficiency. The proposed approach combines the robust coding properties of QC-LDPC codes with SVM’s decision boundary characteristics, enhancing decoding accuracy. Simulation results show that for a code length of 1024 bits, the Bit Error Rate (BER) improved by 15%, while the Frame Error Rate (FER) reduced by 10% compared to traditional QC-LDPC methods. These improvements underscore the potential of SVMs in refining error correction processes for communication systems, particularly in scenarios with high noise interference.
Jayasri Subramaniam, Kousik Nalliyanna Goundar Veerappan
Arden University, United Kingdom
Quasi-Cyclic LDPC, Error Correction, SVM Generation, Bit Error Rate, Frame Error Rate
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| Published By :
ICTACT
Published In :
ICTACT Journal on Data Science and Machine Learning
( Volume: 5 , Issue: 4 , Pages: 697 - 700 )
Date of Publication :
September 2024
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27
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