Quarternary logic is the suitable and yet efficient alternate to the binary
logic due to its simple design and limited power consumption. The
reduction in power consumption is possible because of its narrow
circuit overheads. From existing binary circuits, quaternary signals
and binary signals are produced through Quaternary(four-valued)
logic. The area has been reduced by Quaternary radix on MVL(multi-
valued logic). In terms of normalization, short channel effects, impact
ionization and surface scattering are among the failures encountered.
Resistive-load CNTFET based logic design and a novel Quarternary
logic based on CNTFET adder for signal processing application will be
designed and compared with existing design. A novel circuit
architecture consists of the combination of new device and logic will be
proposed. This novel design will be high speed and low power. SPICE
simulation is used to verify the proposed design. Comparisons are done
with existing design and found an increase in performance of the
overall design. In existing work FinFET was done. For implementation
Stanford University Nanoelectronics Group CNT model files will be
used in Synopsis HSPICE.
V.M. SenthilKumar1, S. Sasikanth2, Swathi Murugan3, Kousik Nalliyanna Goundar Veerappan4
Vivekanandha College of Engineering for Women, India1,2,3, Arden University, United Kingdom4
Multi-Valued Logic (MVL), Quaternary Logic (QTL), FinFET
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 10 , Issue: 1 , Pages: 1753 - 1757 )
Date of Publication :
April 2024
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