vioft2nntf2t|tblJournal|Abstract_paper|0xf4ffb5853300000080ce140001000400 In recent years, operational amplifiers (op-amps) have become an integral part of numerous electronic systems, ranging from communication devices to medical instruments. The pursuit of high-performance, low-power op-amp designs, particularly in Complementary Metal-Oxide-Semiconductor (CMOS) technology, has been a central focus of research and development in the field of analog integrated circuits. To address the growing demand for efficient and reliable op-amps, this paper proposes an innovative evolutionary combinatorial approach for designing and optimizing CMOS transconductance operational apex amplifiers (TOAA). In this study, we introduce the concept of stumpy CMOS op-amp, wherein we prioritize reduced transistor count and employ efficient topologies to minimize the op-amp’s footprint without compromising performance. The integration of stumpy features enhances the algorithm’s capability to produce compact, power-efficient op-amp designs suitable for modern, space-constrained applications. The proposed approach is extensively validated using various benchmark circuits and compared against conventional design methods, demonstrating superior convergence efficiency and consistently providing competitive solutions. Furthermore, the impact of various design constraints and trade-offs on the optimization process is thoroughly analyzed, offering valuable insights for designers seeking to balance performance with area and power consumption. Through experimental results, we showcase the efficacy of the evolutionary combinatorial approach, substantiating its potential to revolutionize the design and optimization of CMOS TOAA circuits. The proposed method empowers circuit designers to efficiently explore the design space, leading to the creation of highly tailored, application-specific op-amps that cater to the demands of the rapidly evolving electronics industry.
R. Santhana Krishnan1, P. Ebby Darney2, V. Bharathi3, Sincy Elezebeth Kuruvilla4
SCAD College of Engineering and Technology, India1, RajaRajeswari College of Engineering, India2,3,4
Evolutionary Algorithms, Combinatorial Optimization, Operational Amplifier, CMOS Transconductance, Stumpy CMOS, Genetic Algorithm, Electronic Design Automation
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 9 , Issue: 2 , Pages: 1568 - 1574 )
Date of Publication :
July 2023
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308
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