vioft2nntf2t|tblJournal|Abstract_paper|0xf4ff1c8533000000bea0140001000200 Circuit-level optimization is a critical aspect of designing low-power VLSI circuits for IoT devices. Traditional optimization methods may struggle to explore the vast design space and find the most energy-efficient solutions. This paper introduces a novel approach to circuit-level optimization using an evolutionary chaotic algorithm (ECA) in the context of IoT device design. The ECA leverages the principles of chaos theory and evolutionary algorithms to efficiently explore and optimize the design parameters, leading to significant reductions in power consumption while maintaining performance and functionality. The proposed method is evaluated on various IoT circuit designs, demonstrating its effectiveness in achieving enhanced energy efficiency compared to conventional optimization techniques. By harnessing the power of chaos and evolution, this research contributes to the development of sustainable and high-performance IoT devices that can operate on limited power resources.
B. Anuradha1, M.S. Kavitha2, S. Karthik3, N. Karthikeyan4
SNS College of Engineering, India1, SNS College of Technology, India2,3,4
Circuit-Level Optimization, Low-Power VLSI, Internet of Things (IoT), Evolutionary Chaotic Algorithm, Energy Efficiency, Chaos Theory, Evolutionary Algorithms, Design Parameters, Power Consumption, Sustainable IoT
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 9 , Issue: 2 , Pages: 1562 - 1567 )
Date of Publication :
July 2023
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686
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