vioft2nntf2t|tblJournal|Abstract_paper|0xf4ffb484330000006b97140001000200 A multi-task, all-purpose, and adaptable stage for videocassette and image processing is presented in this study. The aforementioned is necessary to provide an actual, low-cost, extraordinary enactment in addition to a hardware policy outside of the software due to the collective needs of handling power in several contemporary picture and video handling applications. In order to achieve this neutrality, we want to design a mechanism that makes use of the robust similar handling structure in the FPGA. An example technique is being developed on the FPGA Xilinx Virtex-II by the inclusion of implanted memory control processor, and line technologies, following the intended scheme equal structural design and methods. The developed process includes a variety of thoughtfully designed components, such as control exposure in terms of zoom-in and out utilities that provide it the adaptability to be used as a universal cinematographic treatment platform according to different application needs. The final configuration uses around 23% of the logic source, 57% of the on-chip memory, and uses about 190 mw of power overall.
Prashant Bachanna1, Baswaraj Gadgay2
Visvesvaraya Technological University, Belagavi, India1, Visvesvaraya Technological University, Kalaburagi, India2
FPGA Reconfigurable Scheme, Video Plus Image Handling, Edge Discovery, Image Scaling
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 9 , Issue: 2 , Pages: 1529 - 1533 )
Date of Publication :
July 2023
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729
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