vioft2nntf2t|tblJournal|Abstract_paper|0xf4ff819831000000c868120001000300 Embedded processors, which are an essential component of any Internet of Things (IoT) device, are vulnerable to a considerable risk posed by power side-channel attacks. Defences against power attacks have been implemented at the application level, such as ways for masking a device power use, or at the hardware level, in the form of leakage concealment methods. In this paper, we describe an innovative method for mitigating power side channel attacks through the utilisation of integrated cache. We employ an open-source embedded cache simulator that can be used as the basis for the embedded cache model. The results show that Federated Learning (FL) can discover attack sequences on real-world processors without requiring knowledge of the processor replacement policies and prefetchers.
J. Seetha1, Ananda Ravuri2, Yamini Tondepu3, T. Kuntavai4
Panimalar Engineering College, India1, Intel Corporation, Oregon, United States2, Koneru Lakshmaiah Education Foundation, India3, Adhiparasakthi Engineering College, India4
Attack, Federated Learning, IoT, Processor, Embedded
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 9 , Issue: 1 , Pages: 1492 - 1497 )
Date of Publication :
April 2023
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179
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