vioft2nntf2t|tblJournal|Abstract_paper|0xf4ff26b42e000000634b100001000400 In this paper, the authors propose a system for testing and verification of DAC’s static parameters. The parameters considered for testing are Gain, Offset, Differential Non-Linearity, and Integral Non-Linearity errors. The Loopback method is employed to verify the functionality of both DAC and ADC with multiple frequencies. The existing DAC’s linearity testing approaches include signal conditioning circuits, but the proposed system does not use any additional circuit components for testing. So, the access time of DAC and ADC can be reduced, it is demonstrated by doing experimentation on 12-bit serial Octal DAC (AD5328) IC, and 12-bit serial Dual ADC (AD7266) using Altera FPGA Kit with Quartus Prime Software through Verilog. The detailed analysis of test results concludes that the static characteristics of DAC are met with its specifications. The power consumption for DAC_ADC Functionality test module is 0.143Watts, (Pstatic – 0.097W, Logic – 0.001W, Inputs/Outputs – 0.039W, Clocks – 0.006W). The minimum testing time for the DAC_ADC functionality test for single data is 0.66µs.
Basavaraj Rabakavi1,Saroja V Siddamal2
Government Engineering College, Haveri, India1,KLE Technological University, India2
Functional testing, Differential Non-Linearity, Integral Non-Linearity, Static Testing, Digital to Analog Converter
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| Published By :
ICTACT
Published In :
ICTACT Journal on Microelectronics
( Volume: 8 , Issue: 3 , Pages: 1424 - 1429 )
Date of Publication :
October 2022
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671
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